The present invention relates to a method and a circuit arrangement for synchronizing switching mechanisms or program sequences with an external frame clock pulse.
When designing, for example, modern data transmission devices the modulators are increasingly designed as purely digital circuits. These circuits operate with fixed switching cycles and must be able to be synchronized with an external clock pulse when required.
German Pat. No. 1,287,609 discloses a method for stepwise synchronizing synchronous transmission systems where, depending on requirements, a higher clock pulse frequency, no clock pulse frequency or a lower clock pulse frequency is fed to the input of a divider chain and the desired clock pulse appears at the output of the divider chain. This method can be realized only with complicated circuitry.